Gain amplifiers usually form an input stage of a switched analog to digital converter (ADC). FIG. 4 shows an example of such a gain amplifier 400. A differential input signal VinP, VinM is fed to a differential amplifier 440 via a switched capacitor network. The switched capacitor network comprises two capacitors 410a, b which are switched in the input signal path of the differential amplifier 440 by means of switches 402 and 404. A first terminal of capacitor 410a is coupled through switches 402a and 404a with either the non-inverting or inverting input signal VinP, VinM. Similarly, the first terminal of capacitor 410b is coupled with either the non-inverting or inverting input signal VinP, VinM via switches 402b or 404b. Switches 402a and 404b are controlled by clock signal Φ and switches 404a and 402b by the inverted clock signal #Φ. The second terminal of capacitors 410a and 410b are coupled directly with the non-inverting and inverting input of differential amplifier 440, respectively. The differential amplifier 440 comprises a differential output and feedback capacitors 430a, b in the non-inverting and inverting signal path. To prevent the differential amplifier 440 to integrate all signals at its input, switches 450a and 450b are controlled to reset the differential amplifier 440. FIG. 4, thus shows a typical conventional circuit, wherein in order to have a switching on phase at the outputs of the amplifier 440, The switches 450a/b are switching with the phase Φ.
When Φ is on (phase Φ), the amplifier is reset and capacitor 410a is switched from VinM to VinP while capacitor 410b is switched from VinP to VinM. The charge change on the capacitor 410a between phases #Φ and Φ is then ΔQIN (410a)=CIN(VinP−VinM). The charge change on the capacitor 410b between #Φ and Φ is then ΔQIN (410b)=CIN(VinM−VinP). The differential charge difference stored on the caps 410a,b between phases #Φ and Φ is then:ΔQIN(#Φ,Φ)=ΔQIN(410a)−ΔQIN(410b)=2CIN(VinP−VinM).
FIG. 5 shows the associated switching control signal Φ and output voltage OP-OM. The analog amplifier output signal OP-OM toggles between 0 an 2CIN/CFB(VinP−VinM). The charge difference ΔQIN is transferred to the output voltage of the operational amplifier with a gain of 1/Cfb. The problem with this algorithm is that in this case the charge is pulled from the input during both phases Φ and #Φ while it is only transferred once (during #Φ). The differential input impedance averaged during a cycle (Φ phase then #Φ phase) is equal to:                ZIN diff=1/f*Output Voltage transferred/(ΔQIN (Φ,#Φ)−ΔQIN (#Φ, Φ)) where f is the frequency of the full cycle (Φ phase then #Φ phase). So, ZIN diff=1/(2f*CIN). The input impedance only depends on CIN and the frequency f of the cycle.        
This low input impedance, which is typical in switched capacitance type ADCs (like the sigma-delta ADCs), results from the fact that the input is a capacitance that is switched back and forth to sample the input signals. The problem is that in low-noise ADCs, the noise (especially thermal noise) is also inversely proportional to the capacitance (thermal noise is a multiple of kT/CIN, wherein T being the absolute temperature. So if the capacitance is smaller, the input impedance is better but the noise is larger.
Hence, there is a need for a switched-capacitance gain amplifier with an improved input capacitance.